What is the word size of a processor?

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In summary, the word size of a processor refers to how many bits the processor can process at one time. This is the organizational structure size of the processor, including the size of registers and the width of the ALU. It is not the same as the fundamental memory structure size, which is the byte. While most people think of a byte as 8 bits, this is not always the case. Some mainframe processors have a byte size that is equal to the word size, which can be 32, 64, or even 80 bits. When a computer has a byte size smaller than the word size, it requires multiple memory fetches to get a word for processing, which can slow down the system. A nibble,
  • #1
treehouse
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I know the word size of a processor is how many bits it can 'process' at a time but I'd like some elaborations of that.
 
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  • #2
I don't know what elaboration it needs. That's it. It is the organizational structure size of the processor. It's how big the registers are. It's how wide the ALU is. It is, as you said, the # of bits a processor can process at one time.

It is NOT, by the way, the fundamental MEMORY structure size. That's the byte. These days folks think "byte = 8 bits" but that's not correct. There are mainframe processors where the byte size = the word size = 32 bits. On PCs the byte IS 8 bits, but it's not defined as 8 bits. The problem, to the extent that one can consider it a problem, of having a byte size smaller than a word size is that it then requires multiple memory fetches to get a word for processing. That's why mainframes (think FAST) often have byte size = word size.
 
  • #3
I thought word is 16bits and has nothing to do with how many bits the processor can process at one time.

My knowledge is in the grandfather's days, but I really think the word is defined as 16 bit just like the byte is 8 bits and never change! Today when they talk about 64 bit bus is 4 word wide! Correct me if I am wrong as I am an analog guy that over step into the digital world.
 
  • #4
phinds said:
I don't know what elaboration it needs. That's it. It is the organizational structure size of the processor. It's how big the registers are. It's how wide the ALU is. It is, as you said, the # of bits a processor can process at one time.

It is NOT, by the way, the fundamental MEMORY structure size. That's the byte. These days folks think "byte = 8 bits" but that's not correct. There are mainframe processors where the byte size = the word size = 32 bits. On PCs the byte IS 8 bits, but it's not defined as 8 bits. The problem, to the extent that one can consider it a problem, of having a byte size smaller than a word size is that it then requires multiple memory fetches to get a word for processing. That's why mainframes (think FAST) often have byte size = word size.

For the ALU, register, and the processor itself, how is the word size physically expressed?
 
  • #5
yungman said:
I thought word is 16bits and has nothing to do with how many bits the processor can process at one time.

My knowledge is in the grandfather's days, but I really think the word is defined as 16 bit just like the byte is 8 bits and never change! Today when they talk about 64 bit bus is 4 word wide! Correct me if I am wrong as I am an analog guy that over step into the digital world.

That is incorrect. My post is correct. I've been doing and teaching this stuff since 1962.
 
  • #6
treehouse said:
For the ALU, register, and the processor itself, how is the word size physically expressed?

As a number. For the Z80 and early Intel processors (8080) it was 8 bits.

For mini-computers in the 1970's it was 16 bits.

For some mainframes it has been various values. I've seen 32, 64, 66 and I vaguely recall one that I think had 80 bits. Very weird.

When computers have bytes size less than word size, then, as I said, it requires multiple fetches for a word to process. Actual physical fetching is often augmented by various schemes to avoid too much slowdown, and pipelines are often used for the same reason. Only when the instruction path changes (a jump instruction) does the pipeline have to be dumped and restarted for instruction fetches. Data fetches are more likely to be random so often can't avoid the slowdown.
 
  • #7
phinds said:
As a number. For the Z80 and early Intel processors (8080) it was 8 bits.

For mini-computers in the 1970's it was 16 bits.

For some mainframes it has been various values. I've seen 32, 64, 66 and I vaguely recall one that I think had 80 bits. Very weird.

When computers have bytes size less than word size, then, as I said, it requires multiple fetches for a word to process. Actual physical fetching is often augmented by various schemes to avoid too much slowdown, and pipelines are often used for the same reason. Only when the instruction path changes (a jump instruction) does the pipeline have to be dumped and restarted for instruction fetches. Data fetches are more likely to be random so often can't avoid the slowdown.

I really enjoyed reading your post, phinds. Thanks.
I'll remember most of the terminology but I won't really understand it without further elaboration.
 
  • #8
So what's a 'nibble'?
 
  • #9
sophiecentaur said:
So what's a 'nibble'?

As I recall, a nibble is 4 bits --- a chunk size taken because the value it holds it can be expressed with one hex "digit".

Don't know if that was ever "formally" defined, but I've seen it used a lot as meaning 4 bits. The name, obviously, is chosen because it is part of a byte, not a whole "bite".
 
  • #10
treehouse said:
I really enjoyed reading your post, phinds. Thanks.
I'll remember most of the terminology but I won't really understand it without further elaboration.

Hm ... I'm not clear on what further elaboration you need here. Can you be more specific? What exactly is it that doesn't quite sink in? Can you even pinpoint it? (I know I sometimes have a hard time figuring out just what something won't stick with me).
 
  • #11
phinds said:
Hm ... I'm not clear on what further elaboration you need here. Can you be more specific? What exactly is it that doesn't quite sink in? Can you even pinpoint it? (I know I sometimes have a hard time figuring out just what something won't stick with me).

I want to know how it is that each word is read individually.
 
  • #12
phinds said:
As I recall, a nibble is 4 bits --- a chunk size taken because the value it holds it can be expressed with one hex "digit".

Don't know if that was ever "formally" defined, but I've seen it used a lot as meaning 4 bits. The name, obviously, is chosen because it is part of a byte, not a whole "bite".

That's what I would have said, too - just checking that we are both on the same hymn sheet. But I have never heard of a Byte as being anything other than 8bits. 'Words' have always, to me, contained a certain number of Bytes- e.g. "a four Byte word", with 32bits. I haven't ever seen a Byte being specifically (re?)defined at the beginning of any text, which would be necessary if it could ever be taken as other than 8 bits.

I still have a 'facts' booklet (July 1966) for an Elliott 803 computer which used 19 and 39 bit words, with 5 hole punched paper tape and 35mm sound film as the bulk storage medium. Moreover, the instructions were specified in Octal. There is no mention of the word "Byte" in the whole booklet. A real blast from the past. The department soon got into DEC mini computers and then the Byte appeared over my horizon. Amazing that this long word architecture went away, only to come back again.
 
  • #13
treehouse said:
I want to know how it is that each word is read individually.
Most off the shelf memory basically uses 8bit storage. For the processor to use it, it is necessary to take the data out in four, 8 or any other number of dollops. This is done by what I think they call a Memory Chip Controller which, I guess, assembles data from a number of different locations. This presents the processor with already- assembled words, saving it a lot of time.

This really isn't the place to go into the details of computer design - you need a big book and a hot towel for this, I think! Beware all the jargon and acronyms. :smile:
 
  • #14
sophiecentaur said:
Most off the shelf memory basically uses 8bit storage. For the processor to use it, it is necessary to take the data out in four, 8 or any other number of dollops. This is done by what I think they call a Memory Chip Controller which, I guess, assembles data from a number of different locations. This presents the processor with already- assembled words, saving it a lot of time.

This really isn't the place to go into the details of computer design - you need a big book and a hot towel for this, I think! Beware all the jargon and acronyms. :smile:

I agree w/ all of that, BUT ... mainframes, at least the early ones, did not use 8-bit chunks. The byte was the same as the word ... generally 32 bits, but sometimes more, and mini-computers also did not use 8 bit chunks, the byte was the same as the word (16 bits). I don't know what modern mainframes use.

I can't put my hands on a formal definition of "byte" but I recall from my early days, it WAS specifically defined as "the smallest addressable chunk of memory" and over time, as that quantity settled in on 8 bits for computers that most of the world is familiar with, "byte" came to take on the de facto meaning of 8 bits and I have had folks argue w/ me vehemently that it IS ONLY 8 BITS.

treehouse, let me add this about the architecture:

A computer has what's called a CPU (central processing unit), an ALU (arithmetic/logic unit) and an MAR (memory address register), among other things. The MAR is filled with a memory address and the fetch electronics gets the contents of that address. If the byte size is smaller than the word size, then multiple fetches are performed. This fills up a register in the CPU with the contents of memory. If that is an instruction, it goes to the instruction decoding register which has a whole ton of logic on its output to decipher the instruction and do stuff. If it's a data value, it goes to the ALU (or possibly to a specific register if so directed) where it can be used in subsequenst data manipulations.

It's not really as complicted as it might sound and it's tons of fun to learn, but as sophiecentaur, you DO need a big book and a hot towel (I would have said headache pills) because even though it's fun, it does get a bit weird until you get it all down in your head.
 
  • #15
Ah. I see we are using the Anglo Saxon version of ye worde Byte. lol
The 803 was the nearest I came to actual computer hardware in those days. I don't think they had even heard of the word.
 
  • #16
sophiecentaur said:
Ah. I see we are using the Anglo Saxon version of ye worde Byte. lol
The 803 was the nearest I came to actual computer hardware in those days. I don't think they had even heard of the word.

Actually, as I recall, the word byte really was NOT used much at all in the early days, as it was really only of interest to us specialists. I don't think programmers, for example, used it. I designed computer hardware so was heavily into hardware architecture. I think it was only with the advent of personal computers that it started being used and because they all used an 8-bit byte, people started early on in the PC era to use the word as synonymous with 8 bits.
 
  • #17
What architecture makes it such that the word size is all that is processed at a time?
 
  • #18
phinds said:
It is the organizational structure size of the processor. It's how big the registers are. It's how wide the ALU is. It is, as you said, the # of bits a processor can process at one time.

there are a few things correct about what phinds sez here and a few things that are not. if we're referring to a generic processor, the registers inside may be of different widths. some registers may be twice as wide as others.

it also matters what data one is referring to. some DSP and RISC chips have opcode word size that is larger than the data word size.

the most consistent definition that is accurate in a wide variety of situations is the word size of a processor is the the width of the ALU (arithmetic logic unit). this is not always the number of bits that the processor processes "at a time". some embedded chips may have an internal ALU word of 32 bits, but have a data bus width of 8 bits, so the chip has to access four 8-bit words (at different times at the nanosecond scale) before it can process them.

i, personally, like it if a chip has ALU width, data bus width, address bus width, and opcode width all of the same width. i really hate fiddling with efficiently stuffing 48-bit opcodes into 32-bit wide memory spaces.

It is NOT, by the way, the fundamental MEMORY structure size. That's the byte. These days folks think "byte = 8 bits" but that's not correct. There are mainframe processors where the byte size = the word size = 32 bits. On PCs the byte IS 8 bits, but it's not defined as 8 bits. The problem, to the extent that one can consider it a problem, of having a byte size smaller than a word size is that it then requires multiple memory fetches to get a word for processing. That's why mainframes (think FAST) often have byte size = word size.

phinds, your knowledge is anachronistic. nowadays, nearly a half century from 1962, if you buy or spec any chip, hard drive, thumb drive, blank CD, or whatever storage device, and if the memory capacity is expressed in "bytes" (often they spec it in bits), after any 8-to-6 (or whatever) coding scheme, the number of bits of storage available to the user is always 8 times the number of bytes that the spec. that is always the case and if phinds thinks differently, his knowledge of usage of the word is a few decades out of date.

to his (or her) credit:

from wikipedia:
The size of the byte has historically been hardware dependent and no definitive standards exist that mandate the size. The de facto standard of eight bits is a convenient power of two permitting the values 0 through 255 for one byte. Many types of applications use variables representable in eight or fewer bits, and processor designers optimize for this common usage. The popularity of major commercial computing architectures have aided in the ubiquitous acceptance of the 8-bit size.

note the term "ubiquitous acceptance".
 
  • #19
treehouse said:
What architecture makes it such that the word size is all that is processed at a time?

I don't think you are going to get a suitable answer here, to be honest. Some of us are taking trips down memory lane and others of us are in the modern day. What you need is to look all this up (there must be thousands of books that are good enough to make a start with - or even Wiki). The whole business of computer architecture is far too complicated for a 'question and answer' method of learning. I / we have no idea of how much you actually know so any answers can't be tailored to your needs, I fear. You could waste a lot of your own time trying to do it this way.
Specific and not open questions are better suited to this sort of forum.
 
  • #20
rbj, you're correct of course, I just didn't even want be bring in DSPs and RISC type processors. Then you have the modified Harvard architecture where the data memory and the instruction memory are not on the same address buss. All this stuff is way too complicated for the OP.

I agree that 8 bits is the de facto std for "byte" (and folks now would think it wrong to use it any other way) but as the wiki points out, that's not really the definition.
 
  • #21
A specific question: "What does the register do with bits after storing them?"
Another one: "If they go back to the processor, how are they specially incorporated as a result of coming from the register?"
 
  • #22
the register is PART of the processor (as are all the other components mentioned in this thread, except the memory). What the processor does with the contents of the register depends on a HUGE number of factors, including what specific register you are talking about, what role it is playing at the moment, what the instruction decoder telling everything to do, and so forth.

This whole thread is getting bogged down in your asking simple-sounding questions that have answers that are a bit more complex than you realize and not subject to simple answers. I second the original suggestion that you drop this Q&A attempt to learn computer architecture and get some written material and read it. It isn't all THAT complicated, but it IS more complicated than is suitable for this kind of Q&A
 

Related to What is the word size of a processor?

1. What is the definition of word size in a processor?

The word size of a processor refers to the number of bits that the processor can process at one time. It is typically the size of the registers (temporary storage units) in the processor.

2. How does word size affect the performance of a processor?

A larger word size allows the processor to handle more data at one time, which can lead to faster processing speeds. However, other factors such as clock speed and cache size also play a role in performance.

3. What is the most common word size used in processors today?

The most common word size used in processors today is 64 bits. This has been the standard for desktop and laptop processors for several years now.

4. Can a processor with a smaller word size still perform well?

Yes, a processor with a smaller word size can still perform well. Other factors such as architecture and design can compensate for a smaller word size and still provide efficient processing.

5. Is there a limit to how large a word size can be in a processor?

Technically, there is no limit to how large a word size can be in a processor. However, as technology advances, the need for larger word sizes decreases as other advancements, such as parallel processing, can achieve similar results with smaller word sizes.

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