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treehouse
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I know the word size of a processor is how many bits it can 'process' at a time but I'd like some elaborations of that.
phinds said:I don't know what elaboration it needs. That's it. It is the organizational structure size of the processor. It's how big the registers are. It's how wide the ALU is. It is, as you said, the # of bits a processor can process at one time.
It is NOT, by the way, the fundamental MEMORY structure size. That's the byte. These days folks think "byte = 8 bits" but that's not correct. There are mainframe processors where the byte size = the word size = 32 bits. On PCs the byte IS 8 bits, but it's not defined as 8 bits. The problem, to the extent that one can consider it a problem, of having a byte size smaller than a word size is that it then requires multiple memory fetches to get a word for processing. That's why mainframes (think FAST) often have byte size = word size.
yungman said:I thought word is 16bits and has nothing to do with how many bits the processor can process at one time.
My knowledge is in the grandfather's days, but I really think the word is defined as 16 bit just like the byte is 8 bits and never change! Today when they talk about 64 bit bus is 4 word wide! Correct me if I am wrong as I am an analog guy that over step into the digital world.
treehouse said:For the ALU, register, and the processor itself, how is the word size physically expressed?
phinds said:As a number. For the Z80 and early Intel processors (8080) it was 8 bits.
For mini-computers in the 1970's it was 16 bits.
For some mainframes it has been various values. I've seen 32, 64, 66 and I vaguely recall one that I think had 80 bits. Very weird.
When computers have bytes size less than word size, then, as I said, it requires multiple fetches for a word to process. Actual physical fetching is often augmented by various schemes to avoid too much slowdown, and pipelines are often used for the same reason. Only when the instruction path changes (a jump instruction) does the pipeline have to be dumped and restarted for instruction fetches. Data fetches are more likely to be random so often can't avoid the slowdown.
sophiecentaur said:So what's a 'nibble'?
treehouse said:I really enjoyed reading your post, phinds. Thanks.
I'll remember most of the terminology but I won't really understand it without further elaboration.
phinds said:Hm ... I'm not clear on what further elaboration you need here. Can you be more specific? What exactly is it that doesn't quite sink in? Can you even pinpoint it? (I know I sometimes have a hard time figuring out just what something won't stick with me).
phinds said:As I recall, a nibble is 4 bits --- a chunk size taken because the value it holds it can be expressed with one hex "digit".
Don't know if that was ever "formally" defined, but I've seen it used a lot as meaning 4 bits. The name, obviously, is chosen because it is part of a byte, not a whole "bite".
Most off the shelf memory basically uses 8bit storage. For the processor to use it, it is necessary to take the data out in four, 8 or any other number of dollops. This is done by what I think they call a Memory Chip Controller which, I guess, assembles data from a number of different locations. This presents the processor with already- assembled words, saving it a lot of time.treehouse said:I want to know how it is that each word is read individually.
sophiecentaur said:Most off the shelf memory basically uses 8bit storage. For the processor to use it, it is necessary to take the data out in four, 8 or any other number of dollops. This is done by what I think they call a Memory Chip Controller which, I guess, assembles data from a number of different locations. This presents the processor with already- assembled words, saving it a lot of time.
This really isn't the place to go into the details of computer design - you need a big book and a hot towel for this, I think! Beware all the jargon and acronyms.
sophiecentaur said:Ah. I see we are using the Anglo Saxon version of ye worde Byte. lol
The 803 was the nearest I came to actual computer hardware in those days. I don't think they had even heard of the word.
phinds said:It is the organizational structure size of the processor. It's how big the registers are. It's how wide the ALU is. It is, as you said, the # of bits a processor can process at one time.
It is NOT, by the way, the fundamental MEMORY structure size. That's the byte. These days folks think "byte = 8 bits" but that's not correct. There are mainframe processors where the byte size = the word size = 32 bits. On PCs the byte IS 8 bits, but it's not defined as 8 bits. The problem, to the extent that one can consider it a problem, of having a byte size smaller than a word size is that it then requires multiple memory fetches to get a word for processing. That's why mainframes (think FAST) often have byte size = word size.
The size of the byte has historically been hardware dependent and no definitive standards exist that mandate the size. The de facto standard of eight bits is a convenient power of two permitting the values 0 through 255 for one byte. Many types of applications use variables representable in eight or fewer bits, and processor designers optimize for this common usage. The popularity of major commercial computing architectures have aided in the ubiquitous acceptance of the 8-bit size.
treehouse said:What architecture makes it such that the word size is all that is processed at a time?
The word size of a processor refers to the number of bits that the processor can process at one time. It is typically the size of the registers (temporary storage units) in the processor.
A larger word size allows the processor to handle more data at one time, which can lead to faster processing speeds. However, other factors such as clock speed and cache size also play a role in performance.
The most common word size used in processors today is 64 bits. This has been the standard for desktop and laptop processors for several years now.
Yes, a processor with a smaller word size can still perform well. Other factors such as architecture and design can compensate for a smaller word size and still provide efficient processing.
Technically, there is no limit to how large a word size can be in a processor. However, as technology advances, the need for larger word sizes decreases as other advancements, such as parallel processing, can achieve similar results with smaller word sizes.