Law of the PN junction under forward bias. Valid ?

[Amerez]

I'm currently studying the physics of the PN junction. I went though the derivation of the built-in potential in the PN junction under equilibrium:
Diffusion current density = Drift current density
[tex] D_{p}p\frac{dp}{dx} = EU_ppq [/tex]
where [itex] D_{p} [/itex] : Diffusion coefficient for holes
[itex] p [/itex] = holes density in semiconductor
[itex] E [/itex] = electric field
[itex] U_p [/itex] = hole mobility
[itex] q [/itex] = electron charge
integrating on [itex] x [/itex] we get :
[tex] \int_{junction\ width}^{} D_{p} q \frac{dp}{dx} {d}x = \int_{junction\ width}^{} E U_p p q {d}x \implies [/tex]
[tex] \int_{p_{n0}}^{p_{p0}} D_{p} \frac {1}{p} {d}p = U_p \int_{junction\ width}^{} E {d}x [/tex]
some mathematics and the resulting formula is:
[tex] ln \frac{p_{p0}}{p_{n0}} = \frac{V_{built\text{-}in}}{V_t} \implies [/tex]
[tex] p_{n0} e ^ \frac{V_{built\text{-}in}}{V_t} = p_{p0} [/tex]
Which can be understood as [itex] {V_{built\text{-}in}} [/itex] is the necessary voltage to counter the diffusion from concentrations [itex] p_{p0} [/itex] to [itex] p_{n0} [/itex]
This is called the law of the junction.
Up to this point everything is fine. The problem is:
This law is also used in forward bias. The [itex] V_{built\text{-}in} [/itex] is substituted by the net resultant voltage of the forward bias.
This is wrong, the resultant voltage is NOT countering the diffusion current along the gradient, there is forward current flowing. And the formula we based our derivation on should now be:
[tex] D_{p}p\frac{dp}{dx} = EU_ppq + I_{f} \implies [/tex]
[tex] \int_{junction\ width}^{} D_{p} q \frac{dp}{dx} {d}x = \int_{junction\ width}^{} E U_p p q {d}x \implies + \int_{junction\ width}^{} I_{f}{d}x [/tex]
How is the first formula used as the law of the junction? Am I missing something? Is there some other derivation I'm not aware about ?

 

[Amerez]

Added and Image for clarification:

https://www.physicsforums.com/data/attachments/56/56624-b0ed937602c8f87174ba11c307ccd2c5.jpg

 

[Amerez]

I found the answer to the question in this book:
"Muller & Kamins - Device Electronics for Integrated Circuits - 3rd edition" - page 246

The summary of it is that the forward bias current that flows in practice is so small compared to the Drift-Diffusion currents (about 0.1%). So the term [itex] \int_{junction\ width}^{} I_{f}{d}x [/itex] in the last equation can be ignored.

The book doesn't state it exactly this way, but in an equivalent form:
To determine the validity of the quasi-equilibrium assumption, we compare the magnitude of typical currents to the balanced drift and diffusion tendencies at thermal equilibrium. For a typical integrated-circuit pn junction, in which the hole concentration changes from 1018 to 104 cm-3 across a depletion region about 10-5 cm wide, the hole diffusion current for the average gradient is of the order of 105 A cm-2. As we saw in Chapter 4, at thermal equilibrium this tendency of holes to diffuse is exactly balanced by an opposite tendency to drift under the influence of the electric field in the depletion region. We already argued that typical forward-bias diode currents are roughly 102 A cm-2-only 0.1 % of the two current tendencies in balance at thermal equilibrium. Thus, it is reasonable to treat the case of small and moderate biases by considering only slight deviations from thermal equilibrium. This means that we can relate the carrier concentrations on either side of the junction space-charge region by considering the effective barrier height to be [itex](Φ_i - V_a)[/itex] and by using Equations 5.3.7 and 5.3.8. These two equations also depend on the validity of the low-level injection assumption. The current tendencies at pn junctions that are in detailed balance at thermal equilibrium are so large relative to currents that flow in practice that a more general relationship than Equations 5.3.7 and 5.3.8 is valid.