How to Implement a JK Flip Flop for a Given State Diagram?

[Caldus]

Given the table of a state diagram:

Qpresent | Input | Qnext | Output
0          0       0       0
0          1       1       1
1          0       1       0
1          1       0       0

So, output = Qpresent' * Input

I must use a JK flip flop implementation of all of this. I have to figure out what flip-flop inputs are needed to make the next-state transitions take place. Then I have to put those flip-flop inputs into a Karnaugh map and simplify the algebraic expression. Then I have to draw the circuitry to implement those algebraic expressions. Then I have to repeat the last two steps for the output; which is also a function of the current state and input. Any kind of help appreciated...

 

[flexifirm]

here is a solution:

http://flexifirm.tripod.com/JK1.jpg
http://flexifirm.tripod.com/JK2.jpg

take care

 

[ravenprp]

The JK flip flop is a type of sequential logic circuit that can store one bit of information and has two stable states, 0 and 1. It has two inputs, J (set) and K (reset), and two outputs, Q (previous state) and Q' (complement of previous state). The state of the flip flop changes based on the inputs and the current state.

To implement the state diagram given, we need to determine the inputs for the J and K inputs of the JK flip flop. Looking at the state table, we can see that the output (Qnext) is equal to the input (J) when the input is 1 and the present state (Qpresent) is 0. Similarly, the output is equal to the complement of the input (K) when the input is 0 and the present state is 1. This can be represented as:

J = Input * Qpresent'
K = Input' * Qpresent

Using these expressions, we can create a Karnaugh map to simplify the algebraic expressions. The K-map will have two variables, Qpresent and Input. The simplified expressions for J and K are:

J = Input
K = Qpresent' * Input'

Next, we need to draw the circuitry to implement these expressions. The circuit will have two AND gates and one OR gate. The inputs to the AND gates will be the Input and Qpresent' for J, and Qpresent and Input' for K. The outputs of the AND gates will be connected to the inputs of the OR gate, and the output of the OR gate will be connected to the J and K inputs of the JK flip flop.

For the output, we can see that it is a function of the current state and input. The output is equal to the complement of the current state (Qpresent') multiplied by the input. This can be represented as:

Output = Qpresent' * Input

We can use the same K-map and circuitry as before, with the output being the final output of the OR gate.

In summary, to implement the state diagram using a JK flip flop, we need to determine the inputs for the J and K inputs, simplify the expressions using a Karnaugh map, draw the circuitry, and then repeat for the output. It is important to note that this is just one possible implementation and there may be other ways to implement the state diagram using a JK flip flop.