Vout of non-inverting adder circuit

[leroyjenkens]

Homework Statement

I need to derive this expression [itex]v_{out}=\frac{1}{2}(v_{1}-v_{2})(\frac{R_{3}+R_{2}}{R_{3}})[/itex]

Using the circuit I'm given. I uploaded it.

The Attempt at a Solution

So far I have [itex]v_{in}=v_{+}+v_{-}[/itex] which is from "rule #2 of op amps", which is "The feedback in the op-amp circuit drives the voltage differences between the inverting and non-inverting inputs to zero."

And since the circuit looks like a voltage divider, I can use the voltage divider equation to get [itex]v_{out}=v_{in}(\frac{R_{2}}{R_{1}+R_{2}})[/itex], which gives me [itex]v_{out}=(v_{1}+v_{2})(\frac{R_{2}}{R_{1}+R_{2}})[/itex], but I can't figure out why there's a [itex]\frac{1}{2}[/itex] in front of the equation that I'm given at the beginning, or why the term with the resistors is the inverse of mine.

Thanks.

 

[rude man]

I can't even imagine how you came up with your "voltage divider".

Start from the + input pin of the op amp. What is that voltage in terms of v1 and v2?

 

[leroyjenkens]

I can't even imagine how you came up with your "voltage divider".

Start from the + input pin of the op amp. What is that voltage in terms of v1 and v2?

I think I used the wrong resistors. I meant to use R2 and R3. That would be a voltage divider, right?

The voltage at the + input pin has to be zero, so [itex]v_1=-v_2[/itex]

 

[rude man]

I think I used the wrong resistors. I meant to use R2 and R3. That would be a voltage divider, right?

The voltage at the + input pin has to be zero, so [itex]v_1=-v_2[/itex]

But, but ... v1 and v2 are your inputs! They can be anything you want so long as the amplifier's limits are not exceeded. In this case, the + and - op amp inputs must be between -8 and +8V, approximately, depending on the particular op amp type and the power supplies.

In other words - no, the + input does not have to be zero. It just has to be the same as the - input.

 

[leroyjenkens]

We built this in a lab and I found that v1 and v2 were both 3.55, and the saturation was 14.06. And to make this equation true: [itex]v_{out}=2(v_{1}+v_{2})[/itex] I needed R3 to be 1 ohm and R2 to be 3 ohms.

So vout has to be equal to vin and I calculate what that is across the voltage divider at the bottom? So [itex]v_{out}=2(v_{1}+v_{2})[/itex] and [itex]v_{in}=(v_{1}+v_{2})[/itex]
And vin across the voltage divider is [itex](v_{1}+v_{2})(\frac{R_{3}}{R_{3}+R_{2}})[/itex]

And I have no idea how to turn that into this: [itex]v_{out}=\frac{1}{2}(v_{1}+v_{2})(\frac{R_{3}+R_{2}}{R_{3}})[/itex]

 

[rude man]

You say you "found" that v1 and v2 were both 3.55V? How did those voltages get there?

Are we talking about the right circuit in the first place?

If we are, you need to answer the above question and the one I asked before, to wit, what is the voltage at the + input of the amplifier?

Don't proceed until you have answered those two questions.

 

[leroyjenkens]

You say you "found" that v1 and v2 were both 3.55V? How did those voltages get there?

Are we talking about the right circuit in the first place?

If we are, you need to answer the above question and the one I asked before, to wit, what is the voltage at the + input of the amplifier?

Don't proceed until you have answered those two questions.

That was the voltage I supplied to both v1 and v2 to which point it saturated at 14.06.

Yeah, I built this circuit on a protoboard.

The voltage at the + input would be v1 + v2, would it not? , and the voltage at the - input would also be v1 + v2, right?

 

[rude man]

That was the voltage I supplied to both v1 and v2 to which point it saturated at 14.06.

Yeah, I built this circuit on a protoboard.

The voltage at the + input would be v1 + v2, would it not?

No. If v1 = v2 there is no current in either R1 so how can the midpoint, which is the + input to the op amp, be 7.1V?

, and the voltage at the - input would also be v1 + v2, right?

[/quote]

If your output is saturated it is no longer true that the + and - inputs are the same. So not only is the - input not v1 + v2, it isn't even the same as the + input.

The reason the output is saturated is that there is insufficient fedback voltage.
The feedback voltage is Vout*R3/(R2+R3). I would say make R3/(R2+R3) at least 0.5. You neeed to make this ratio high enough to bring the output out of saturation. Either that or reduce your input voltages.

What are R1, R2 and R3 anyway?