Capacitors in parallel for lower ESR question

In summary: It really depends on a lot of factors, including the specific application. Also if two caps are in parallel and each cap has a ESR rating of for example 150 miliOhms then the total ESR of those two caps will be 150 divided by the number of caps which is two and the total would then be about 75 miliOhms ?Yes, that's correct.
  • #1
Salvador
505
70
so I am facing the need for low esr and high ripple current for a smps output filter after rectifier.
Would it be better in terms of both ESR and ripple to put say 8x470uF in parallel or 4x1000uF ?
Or maybe there wouldn't be a big difference ? Assuming both caps are with a low esr and high ripple ratings.

It's also a matter of available space and ergonomics but ofcourse the electric characteristics come first hand.
 
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  • #2
Salvador said:
so I am facing the need for low esr and high ripple current for a smps output filter after rectifier.
Would it be better in terms of both ESR and ripple to put say 8x470uF in parallel or 4x1000uF ?
Or maybe there wouldn't be a big difference ? Assuming both caps are with a low esr and high ripple ratings.

It's also a matter of available space and ergonomics but ofcourse the electric characteristics come first hand.
Just use the datasheets to do the ESR and ripple current comparisons... :smile:
 
  • #3
I'm talking overall , I just keep reading this on many places on the net that it's always better for lower esr to put more smaller capacitance caps in parallel than to put fewer larger ones , even if the capacitance doesn't differ in both cases.
So I have this question
 
  • #4
Salvador said:
I'm talking overall , I just keep reading this on many places on the net that it's always better for lower esr to put more smaller capacitance caps in parallel than to put fewer larger ones , even if the capacitance doesn't differ in both cases.
So I have this question
That's why I said to check the datasheet. "Low ESR" is not quantitative.
 
  • #5
oh correct now I got you , the ESR values may differ from cap to cap even if other ratings are the same.I misunderstood you in the first place.

Ok a few follow ups just to clarify the picture if I may.
what if a combination of 4 caps in parallel each having 1000uF has a given ESR , and then another combination of 6 x 820uF caps again have that same ESR , also all other ratings are the same and matched except the capacitance is bit higher in the second case , which arrangement would be better then ?

Also if two caps are in parallel and each cap has a ESR rating of for example 150 miliOhms then the total ESR of those two caps will be 150 divided by the number of caps which is two and the total would then be about 75 miliOhms ?

and another thing I wish to know is when adding caps in parallel the individual ripple current ratings of each cap add up correct? So if one cap has a max rating of 2A then two such caps in parallel would be able to have a max of 4A?P.S. If I think correctly about the ESR then apart from other parameters one of the more important ones for low ESR is total plate area of all caps in parallel and how easy the charge can get to distribute across that area? So theoretically the question whether more caps in parallel equal less ESR is hard because on one side the total are increases and the distribution maybe is more even but on the other side each cap has pins and soldering points etc that adds up more resistance , well I'm not sure.
 
  • #6
how much ripple current do you anticipate ?
in general, paralleling caps parallels their ESR
and of course interconnecting means should be robust low impedance

see what you think of these, maybe five bucks apiece
http://www.cde.com/resources/catalogs/SLP.pdf
http://www.digikey.com/product-deta...ronics-cde/SLP102M200H5P3/338-1454-ND/1881931

and you always parallel electrolytics with high frequency capacitor, maybe a 0.1 ceramic made for bypassing
as exp;ained in that CDE paper, electrolytic capacitors being wound into a coil so they'll fit inside the can, have 'equivalent series inductance' too.
 
  • #7
well i kind of searched through and found some caps that not only match my ratings but also physically fit into my pcb space.

as for the ripple current , previously I had 4x470uF/200v caps parallel , at idle i looked with a scope and saw about 1-2volts of ripple coming from the ground trace , some of it may have been induced parasitics due to the " breadboard" type assembly of my experimental smps, now with a pcb and everything thought out it should be better.

Also can someone confirm my assumptions in my previous post? What about you Jim, what do you think ?
 
  • #8
Salvador said:
what if a combination of 4 caps in parallel each having 1000uF has a given ESR , and then another combination of 6 x 820uF caps again have that same ESR , also all other ratings are the same and matched except the capacitance is bit higher in the second case , which arrangement would be better then ?
"Better" is subjective... do you count the aesthetics of how it looks and difficulty of mounting?
With filter caps the old adage "more is better" points to your second choice.
If the caps are worked hard, ie lots of ripple, there may be some advantage in heat dissipation from the increased surface area of several caps.
Salvador said:
Also if two caps are in parallel and each cap has a ESR rating of for example 150 miliOhms then the total ESR of those two caps will be 150 divided by the number of caps which is two and the total would then be about 75 miliOhms ?
Ohm would not disagree with that, neither would i.
Salvador said:
and another thing I wish to know is when adding caps in parallel the individual ripple current ratings of each cap add up correct? So if one cap has a max rating of 2A then two such caps in parallel would be able to have a max of 4A?
yes, so long as nothing in your layout causes current to divide unequally. So keep interconnecting wires short and stout.
Salvador said:
each cap has pins and soldering points etc that adds up more resistance , well I'm not sure.
be more confident in your basics, they solve 99% of problems. What is resistance of a few mm of wire? How does that compare to ESR of your cap? Avoid big loops for they have inductance.
 
  • #9
thank you Jim
 
  • #10
Don't ignore the effects of heat. Many electrolytic capacitors are specified to operate at say 105C however if you read the small print the life expectancy at 105C might be as low as 2000 hours (83 days!). That could be less than the warranty period of the product = very expensive failure rate. In general every 10C increase/decrease in temperature can half/double the life expectancy.
 
  • #11
thanks CWatters for the reminder , yes I am aware of the effects of temperature on caps.
Well there are no heating parts around were they are located, so basically they should be around an ambient room temp maybe +10 degrees since the whole smps is in a vented case of the amplifier.
 
  • #12
Perhaps check heating due to I2R in the ESR?
 
  • #13
hmm ,if I am getting this right the heating due to this comes from the ac ripple going through the cap , since DC can't heat a capacitor.
so my supply is divided with a center tap that makes 6 caps , 3 on each side , each caps has about 2.2 amps of max ripple so together that should be about 6.5 amps.and that across the series resistance whatever that might be because I'm don't know for these caps the specific value will have to look it up.also I have a question.when the psu is at idle and little or no load is attached and no current is consumed is there any considerable ripple current passing through the caps at all?If they stay charged at the peak AC value rectified all the time the rectifier can'y move any additional charge into the caps nor from them so the ripple should be small and it gets bigger as the load becomes heavier and draws more current from the caps so the rectifier has to start filling the " tops" back up on each cycle , am I getting this correctly ?
 
  • #14
CDE type SLP datasheet gives values for both ESR and ripple current .

upload_2016-2-29_17-12-0.png
 

Related to Capacitors in parallel for lower ESR question

1. How do capacitors in parallel reduce ESR?

When capacitors are connected in parallel, their equivalent capacitance increases. This means that the total charge that can be stored also increases, resulting in a lower equivalent series resistance (ESR). This is because the ESR is inversely proportional to the capacitance, so as the capacitance increases, the ESR decreases.

2. What is the advantage of using capacitors in parallel for lower ESR?

The main advantage of using capacitors in parallel for lower ESR is that it helps to improve the stability and efficiency of electronic circuits. A lower ESR means that the capacitors can better filter out high-frequency noise and provide a more stable power supply to the circuit.

3. Is there a limit to the number of capacitors that can be connected in parallel for lower ESR?

There is no specific limit to the number of capacitors that can be connected in parallel for lower ESR. However, it is important to ensure that the total equivalent capacitance does not exceed the maximum allowable value for the circuit. It is also important to consider the physical space available and the layout of the circuit when deciding on the number of capacitors to use.

4. Can capacitors in parallel cause any negative effects on the circuit?

While using capacitors in parallel for lower ESR can have many benefits, it is important to note that there are some potential negative effects. If the capacitors are not well-matched, there can be imbalances in the charge distribution, leading to unequal voltage drops and potential overloading of certain capacitors. It is also important to consider the self-resonant frequency of the capacitors when using them in parallel.

5. Are there any alternative methods for reducing ESR besides using capacitors in parallel?

Yes, there are other methods for reducing ESR, such as using low-ESR capacitors, using multiple smaller capacitors in series, or using inductors in parallel with the capacitors. Each approach has its own advantages and disadvantages, so it is important to consider the specific requirements of the circuit before deciding on the best method for reducing ESR.

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