A little electronics question about logical gates

[I like Serena]

True, but at the end of the day the result is still 0 cause we got a and a(capped) in the same multiplication line so everything gets nullified, right?

Actually, you don't have ##\overline{a}##, but you have ##\overline{ab}##.
But yes, in combination with ##ab##, everything gets nullified.

 

[Femme_physics]

Actually, you don't have ##\overline{a}##, but you have ##\overline{ab}##.
But yes, in combination with ##ab##, everything gets nullified.

Ah, gotcha! Now I am asked to write the logical value of the function Out, when the values of all the ports
C = '0'
A = B = '1'

But still, everything gets nullified right?

 

[I like Serena]

Hold on, I missed something.

It does not get nullified.

You got ##\overline{\overline{ab}c}##, which you took to ##abc##, but that is not right.
That changes everything.

 

[Femme_physics]

You're right.

http://img819.imageshack.us/img819/4949/clipboard02gmq.jpg

 

[cupid.callin]

You're right.

http://img819.imageshack.us/img819/4949/clipboard02gmq.jpg

How did you get the forth line??
check it again !

 

[I like Serena]

Could you add parentheses in the 3rd line?