Hi guys,
I was just wondering, I'm designing a full adder for a bitslice of a 16 bit ALU.
I have SPICED my design and I am getting a propagation delay for the AND mode between the two bits of about 70ps.
I'm working in a low voltage 90nm process.
Am I in the right ballpark in terms of...
Hi guys,
I am a senior EE undergrad at UCLA and will be graduating this spring, 2016. I am applying for PhD programs in EE with a focus on biomedical devices (implantable devices and/or sensor networks and embedded systems).
I am choosing which schools to apply to and would like your advice...